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  document no. 008-0256-0 page 1- 3 rev. g www.ctscorp.com model cb3 & cb3lv hcmos/ttl clock oscillator features ? standard 7.0mm x 5.0mm 4-pad surface mount package ? hcmos/ttl compatible output ? fundamental and 3 rd overtone crystal designs ? frequency range 1 ? 200 mhz ? frequency stability 50 ppm standard, 25 ppm and 20 ppm available ? operating voltages +5.0vdc or +3.3vdc ? operating temperature to -40c to +85c ? output enable standard ? tape & reel packaging ? rohs/green compliant (6/6) applications applications for model cb3 and cb3lv include digital video, networking equipment, wireless communications, broadband access, ethernet/gigabit ethernet, microproce ssors/dsp/fpga, storage area networks, fiber channel, computers and peripherals, test and measurement, sonet/sdh/dwdm, base stations and pico cells. ordering information 4] cts distributors may add a -t or -1 at the end of the part number to indicate tape and reel packaging. not all performance combinations and frequencies may be available. contact your local cts representative or cts customer service for availability. 6 = 20 ppm 1 5 = 25 ppm 3 = 50 ppm [std] 7 = 32 ppm 2 2 = 100 ppm 2 c = -20c to +70c [standard] i = -40c to +85c 1 1] 6i stability/temperature combination is not available. 3] frequency is recorded with only leading significant digits before the ?m? and 4 - 6 significant digits after the ?m? (inclu ding zeros). [ex. 3.579545 mhz, code as 3m579545; 14.31818 mhz, code as 14m31818; 125 mhz, code as 125m0000] lv = +3.3vdc blank = +5.0vdc m - indicates mhz and decimal point. 3 frequency stability operating temperature range supply voltage frequency in mhz m - 2] these stabilities are not recommended for new designs. - cb3 packaging information [reference] device quantity is 1,000 pieces maximum per reel.
document no. 008-0256-0 page 2 - 3 rev. g model cb3 & cb3lv 7.0mm x 5.0mm low cost hcmos/ttl clock oscillator electrical characteristics parameter symbol min typ max unit maximum supply voltage v cc -0.5 - +7.0 v storage temperature t stg -40 - +100 c frequency range cb3 1.5 - 107 cb3lv 1.5 - 200 frequency stability f/f o - - 20,25,50 or 100 ppm aging f-35 ppm o p eratin g tem p erature commercial -20 +70 industrial -40 +85 su pp l y volta g e cb3 4.5 5.0 5.5 cb3lv 3.0 3.3 3.6 supply current 1.5mhz to 20mhz c l =50pf -10 25 20.001mhz to 80mhz c l =50pf -30 50 80.001mhz to 107mhz c l =15pf -40 80 1.5mhz to 20mhz c l =15pf -7 12 20.001mhz to 80mhz c l =15pf -20 40 80.001mhz to 200mhz c l =15pf -30 60 output load c l - - - - - - 50 30 15 pf output voltage levels logic '1' level v oh 90%v cc v cc -0.6v -- logic '0' level v ol -- 10%v cc 0.4 output current logic '1' level i oh - - -16/-8 logic '0' level i ol -- +16/+8 output duty cycle sym 45 - 55 % rise and fall time 1.5mhz to 20mhz c l =50pf -8 10 20.001mhz to 80mhz c l =50pf -5 8 80.001mhz to 200mhz c l =15pf -2.5 5 1.5mhz to 20mhz c l =15pf -6 8 20.001mhz to 80mhz c l =15pf -3 5 80.001mhz to 200mhz c l =15pf -1.5 3 start up time t s -- 10 ms enable function enable input voltage v ih 2.0 - - disable input voltage v il -- 0.8 enable time t plz -- 200 ns standby current i st -- 10 a period jitter, pk-pk - - - 50 period jitter, rms - - - 5 phase jitter, rms - - - 1 notes: 1. electrical parameters ma v ps v cc v f o mhz t a c 25 inclusive of initial tolerance at time of shipment, change s in supply voltage, load, te mperature and 1st year aging. cb3lv i cc ma cb3 - - v conditions - - - - - see note 1 and ordering information first year 10% frequency ran g e tested load condition noted for t yp ical values. 1.5mhz to 50mhz 50.001mhz to 80mhz 80.001mhz to 200mhz @ 50% level @ 10% - 90% levels tested load condition noted for t yp ical values. cmos load 10 ttl load cmos ttl load v oh = 3.9v/2.2v v cc = 4.5v/3.0v v ol = 0.4v v cc = 4.5v/3.0v ns pin 1 logic '0', output disabled bandwidth 12khz - 20mhz cb3 cb3lv t r , t f application of v cc pin 1 logic '1', output enabled pin 1 logic '0', output disabled pin 1 logic '1'
document no. 008-0256-0 page 3 - 3 rev. g model cb3 & cb3lv 7.0mm x 5.0mm low cost hcmos/ttl clock oscillator electrical characteristics mechanical specifications package drawing notes 1. termination pads [e4]. barrier-plating is nickel [ni] with gold [au] flash plate. 2. reflow conditions per jedec j-std-020, 260c maximum. 3. moisture sensitivity le vel 1 per jedec j-std-020. suggested solder pad geometry c bypass should be 0.01 uf. d.u.t. pin assignments pin symbol description 1 eoh enable 2 gnd circuit & package ground 3 output rf output 4 v cc supply voltage test circuit, cmos load lvcmos output waveform enable truth table pin 1 pin 3 logic ?1? output open output logic ?0? high imp. cts**cb3 xxxmxxxxxx yywwstv marking information 1. ** ? manufacturing site code. [note a dash may follow the site code and is acceptable.] 2. xxxmxxxxxx ? frequency is marked with only leading significant digits before the ?m? and 4 ? 6 digits after the ?m? (including zeros). ex. xmxxxxxx [3m579545] xxmxxxxx [14m31818] xxxmxxxx [125m0000] 3. yyww ? date code, yy ? year, ww ? week. 4. st ? frequency stability/temperature code. [refer to ordering information.] 5. v ? voltage code. 3 = 3.3v, 5 = 5.0v.


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